This invention relates to an error-correcting decoder for use as a counterpart of an error-correction encoder.
In the manner which will later be described more in detail, an error-correction encoder is for use in encoding an information symbol sequence into a code symbol sequence which comprises the information symbol sequence and a redundancy bit sequence in accordance with a predetermined rule. The code symbol sequence is either transmitted to a transmission channel or route or stored in a storage medium.
Either transmitted through the transmission channel or reproduced from the storage medium, the code symbol sequence is supplied to a counterpart error-correcting decoder as an input code sequence. When compared with the code symbol sequence produced by the encoder, the input code sequence may have an error or errors mainly due either to noise in the transmission channel or to physical defects of the storage medium. Regardless of presence and absence of such an error, it is possible to understand that the input code sequence corresponds to the code symbol sequence. The redundancy bit sequence is used in the decoder in automatically correcting the error or errors. Correcting the error or errors, the decoder decodes the input code sequence into a decoded symbol sequence which gives a reproduction of the information symbol sequence.
It will also be described more in detail later in the following that a conventional error-correcting decoder comprises an encoder replica responsive to the input code sequence for producing a replica output signal with reference to the predetermined rule and a sequential decode controller for executing a sequential decoding algorithm on the input code sequence and the replica output signal to produce a control signal. Controlled by the control signal, the encoder replica decodes the input code sequence into the above-mentioned decoded symbol sequence.
The sequential decoding algorithm has been executed on the input code sequence and the replica output signal on a symbol by symbol or code by code basis. It has now been confirmed as will become clear as the description proceeds that the prior art error-correcting decoder has a slow decoding speed as a result of execution of the sequential decoding algorithm on such a symbol by symbol basis when each information symbol of the information symbol sequence has a long bit or symbol length. On the other hand, it is highly desirable to deal with a great amount of data or information at a high speed with no error in the present-day information-intensive social system which is realized by a combination of electrical and/or optical communication systems and electronic digital computers.